Vedya Labs participated at the Embedded Vision Summit held in Santa Clara, CA USA in May 2026 and demonstrated optimized implementation of Gen AI models on DSP centric embedded platforms. The demonstration showcases a nearly 500-million-parameter model running on the Axera AX650N SoC, with the text encoder, U-Net, and VAE stages optimized for dual Cadence Tensilica Vision DSPs. Using INT8 quantization and a combination of proprietary and Cadence optimization tools, Vedya Labs achieves high DSP utilization while maintaining practical image generation performance. The demo highlights real-time prompt-to-image generation and illustrates how advanced generative AI models can be efficiently deployed on embedded hardware without relying solely on GPU or NPU accelerators.